Enable hardware 'fail-over' modes in system resource constrained situations so devices are still accessible, but perhaps at less optimal power/performance point.Eliminate the 'Companion Controller' model.Eliminate register writes and minimize register reads for normal data transfers.Minimize host memory accesses, fully eliminating them when USB devices are idle.Decouple the host controller interface presented to software from the underlying USB protocols.A device level programming model that is fully consistent with the existing USB software model.Efficient operation – idle power and performance better than legacy USB host controller architectures.the Open Host Controller Interface (OHCI), the Universal Host Controller Interface (UHCI), and the Enhanced Host Controller Interface (EHCI)) on many counts.įollowing are the key goals of the xHCI architecture: The xHCI is a radical break from the previous generations of USB host controller interface architectures (i.e. XHCI improves on the pre-existing Open Host Controller Interface (OHCI) and the Universal Host Controller Interface (UHCI) architectures most prominently in handling a wider range of speeds within a single standard, in managing resources more efficiently for the benefit of mobile hosts with limited power resources (such as tablets and cell phones), and in simplifying support for mixing of low-speed and high-speed devices. The specification is also referred to as the USB 3.0 host controller specification. ( April 2014) ( Learn how and when to remove this template message)ĮXtensible Host Controller Interface ( xHCI) is a computer interface specification that defines a register-level description of a host controller for Universal Serial Bus (USB), which is capable of interfacing with USB 1.x, 2.0, and 3.x compatible devices. Please help to improve this article by introducing more precise citations. This article includes a list of general references, but it lacks sufficient corresponding inline citations.

Intel 3.1 extensible host controller